Power Management - Xilinx KC705 User Manual

Table 1-29: LPC Connections, J2 to FPGA U1 (Cont'd)
J2 Pin Net Name
G6 FMC_LPC_LA00_CC_P
G7 FMC_LPC_LA00_CC_N
G9 FMC_LPC_LA03_P
G10 FMC_LPC_LA03_N
G12 FMC_LPC_LA08_P
G13 FMC_LPC_LA08_N
G15 FMC_LPC_LA12_P
G16 FMC_LPC_LA12_N
G18 FMC_LPC_LA16_P
G19 FMC_LPC_LA16_N
G21 FMC_LPC_LA20_P
G22 FMC_LPC_LA20_N
G24 FMC_LPC_LA22_P
G25 FMC_LPC_LA22_N
G27 FMC_LPC_LA25_P
G28 FMC_LPC_LA25_N
G30 FMC_LPC_LA29_P
G31 FMC_LPC_LA29_N
G33 FMC_LPC_LA31_P
G34 FMC_LPC_LA31_N
G36 FMC_LPC_LA33_P
G37 FMC_LPC_LA33_N
G39 VADJ

Power Management

[Figure
The KC705 board uses power regulators and PMBus compliant digital PWM system
controllers from Texas Instruments to supply core and auxiliary voltages. The Texas
Instruments Fusion Digital Power graphical user interface is used to monitor the current
and temperature levels of the board's power modules. If any module temperature
approaches 85°C then forced air cooling must be provided to keep the module temperature
within rated limits.
KC705 Evaluation Board
UG810 (v1.4) July 18, 2013
FPGA U1
Pin
AD23
AE24
AG20
AH20
AJ22
AJ23
AA20
AB20
AC22
AD22
AF26
AF27
AJ27
AK28
AC26
AD26
AE28
AF28
AD29
AE29
AC29
AC30
1-2, callout 32]
www.xilinx.com
J2 Pin Net Name
H4 FMC_LPC_CLK0_M2C_P
H5 FMC_LPC_CLK0_M2C_N
H7 FMC_LPC_LA02_P
H8 FMC_LPC_LA02_N
H10 FMC_LPC_LA04_P
H11 FMC_LPC_LA04_N
H13 FMC_LPC_LA07_P
H14 FMC_LPC_LA07_N
H16 FMC_LPC_LA11_P
H17 FMC_LPC_LA11_N
H19 FMC_LPC_LA15_P
H20 FMC_LPC_LA15_N
H22 FMC_LPC_LA19_P
H23 FMC_LPC_LA19_N
H25 FMC_LPC_LA21_P
H26 FMC_LPC_LA21_N
H28 FMC_LPC_LA24_P
H29 FMC_LPC_LA24_N
H31 FMC_LPC_LA28_P
H32 FMC_LPC_LA28_N
H34 FMC_LPC_LA30_P
H35 FMC_LPC_LA30_N
H37 FMC_LPC_LA32_P
H38 FMC_LPC_LA32_N
H40 VADJ
Feature Descriptions
FPGA U1
Pin
AF22
AG23
AF20
AF21
AH21
AJ21
AG25
AH25
AE25
AF25
AC24
AD24
AJ26
AK26
AG27
AG28
AG30
AH30
AE30
AF30
AB29
AB30
Y30
AA30
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