Part 2: Acu2Eg Core Board; Part 2.1: Acu2Eg Core Board Introduction - Alinx ZYNQ UltraScale+ AXU2CG-E User Manual

Part 2: ACU2EG core board

Part 2.1: ACU2EG core board Introduction

ACU2EG (core board model, the same below) FPGA core board, ZYNQ
chip is based on XCZU2CG-1SFVC784E of XILINX company Zynq UltraScale+
MPSoCs CG series.
This core board uses 4 Micron DDR4 chips MT40A512M16GE on the PS
side, to form a 64-bit data bus bandwidth and 2GB capacity. The highest
operating speed of DDR4 SDRAM on the PS side can reach 1200MHz (data
rate 2400Mbps). In addition, a 256MBit QSPI FLASH and an 8GB eMMC
FLASH chip are also integrated on the core board to start storage configuration
and system files.
In order to connect with the carrier board, the four board-to-board
connectors of this core board expand the PS side USB2.0 interface, Gigabit
Ethernet interface, SD card interface and other remaining MIO ports; also
expand 4 pairs of PS MGT high-speed transceiver interface; and almost all IO
ports on the PL side (HP I/O: 96, HD I/O: 84). The wiring between the
XCZU2CG chip and the interface has been processed with equal length and
differential, and the core board size is only 3.15*2.36 (inch), which is very
suitable for secondary development.
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ZYNQ Ultrascale + FPGA Board AXU2CG-E User Manual
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