Sre - Agilent Technologies B2200A User Manual

Femto leakage switch mainframe; 14ch low leakage switch mainframe
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Syntax
Query response
Semantics
Example
SCPI Command Reference

*SRE

*SRE
This command sets the Service Request "Enable" Register bits.
1 enables, 0 masks.
*SRE enable_number
Parameter
enable_number
decimal integer (that is the sum of the binary-weighted values
for the desired bits), hexadecimal, octal, or binary value
enable_number <newline><^END>
The Service Request "Enable" Register consists of 8 bits: Bit0 to Bit7. Bit6 is not
defined, and is always 0. The Service Request "Enable" Register determines which
bits of the Status Byte Register are enabled.
The status of the enabled bits are ORed together, and the result of OR is output to
bit6 (Master Summary Status bit) of Status Byte Register. For details, see "Status
Reporting Structure" on page 5-53.
The following table shows the bits of the Status Byte Register, and the
binary-weighted decimal value of each bit.
bit
binary-weight
0
1
1
2
2
4
3
8
4
16
5
32
6
64
7
128
The following four lines enable the same bits (bit 4 and 5):
OUTPUT @Agb2200;"*SRE 48"
OUTPUT @Agb2200;"*SRE #B110000"
OUTPUT @Agb2200;"*SRE #Q60"
OUTPUT @Agb2200;"*SRE #H30"
5-10
Explanation
description
not used
not used
not used
not used
MAV (Message Available summary-message)
ESB (Event Status Bit)
MSS (Master Summary Status)
not used
using decimal numeric
using binary numeric
using octal numeric
using hexadecimal numeric
Agilent B2200 User's Guide, Edition 2

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