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4.4 Ports
Rear I/O Ports
See the figure below for the locations and descriptions of the various I/O ports on the front
of the motherboard.
1
2
3
#
Description
1.
COM1
2.
USB5 (USB3.0)
3.
USB4 (USB3.0)
4.
IPMI LAN
5.
LAN1
LED2
UID
JUIDB1
MH6
JSXB1A
A
LED3
LAN 2/3/4/5/6/7/8/9
LEDM1
C
A
JSDP3
JBM1
J1
JVGA1
COM2
JMD1_SRW1
JMD1_SRW2
JI2C1/JI2C2:
1-2:ENABLE
2-3:DISABLE
JVRM1
JWD1:WATCH DOG
1-2:RST
JMD2_SRW1
2-3:NMI
JPME2:
1-2:NORMAL
2-3:ME MANUFACTURING MODE
JPG1:VGA
1-2:ENABLE
2-3:DISABLE
JPG1
JSIM1
X11SDW-4C-TP13F+
JPL2
REV:1.00
DESIGNED IN USA
JPL3
JPL2:
LAN 2/3/4/5
1-2:ENABLE
2-3:DISABLE
JPL3:
LAN 6/7/8/9
1-2:ENABLE
2-3:DISABLE
JMD2:M.2-H
PCI-E 3.0 X2 / S-SATA4
JPCIE3
JSXB1C
JL1:
CHASSIS
INTRUSION
MH2
USB 0/1
JNVI2C1
MH7
JUSB1
USB 2/3
S-SATA3
JPH1
JF1
JF1:
PWR
OH
HDD
PWR
RST X
NIC2
NIC1
ON
FF
LED
LED
JD1:
JPT1:TPM
1-2:ENABLE
1-3:PWR LED
2-3:DISABLE
4-7:SPEAKER
S-SATA2
3
MH4
JBT1
4
1
LED1
2
Power LED
JPW1
7
6
4
8
5
9
7
Figure 4-2. I/O Port Definitions
#
Description
6.
SFP+ LAN11
7.
SFP+ LAN10
8.
SFP+ LAN13
9.
SFP+ LAN12
10.
LAN3
53
Chapter 4: Motherboard Connections
PCB EDGE
PRESS FIT
PRESS FIT
1
COM1
USB 4/5(3.0)
LAN 1
IPMI_LAN
MH3
LEDT8
LEDT5
LEDT4
LEDT1
A
A
A
A
JPL1
C
C
C
C
JLANLED2
JPI2C1
A
A
A
A
C
JLANLED1
C
C
C
JTGLED2
LAN 12/13
LAN 10/11
J2
JMD3:M.2-P
PCI-E 3.0 X1
JTGLED1
JGP1
JLANLED3
JPUSB1:
USB4/5 WAKE UP
1-2:ENABLE
2-3:DISABLE
JPL1:
LAN1
1-2:ENABLE
2-3:DISABLE
JMD3_SRW1
S-SATA1
JMD1:M.2-H
JL1
PCI-E 3.0 X4 / I-SATA4
JSD1
BAR CODE
MH5
CPU
BT1
JSTBY1
MH1
FAN4
FAN3
10
12
14
11
13
15
#
Description
11.
LAN2
12.
LAN5
13.
LAN4
14.
LAN7
15.
LAN6
16
17
18
#
Description
16.
LAN9
17.
LAN8
18.
UID Switch
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