Revision History - Lattice Semiconductor MachXO2 Breakout Board User Manual

MachXO2 Breakout Board Evaluation Kit
Evaluation Board User Guide

Revision History

Revision 2.3, February 2022
Section
MachXO2 Breakout Board
Appendix A. Schematic Diagrams
Revision 2.2, January 2014
Section
All
Revision 2.1, September 2013
Section
All
Revision 2.0, February 2013
Section
All
Revision 1.2, December 2012
Section
All
Revision 1.1, January 2012
Section
Features
Revision 1.0, December 2011
Section
All
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All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
32
Change Summary
•
Changed "30, 16, 7" to "30(VCCIO3), 16(VCCIO4), 7(VCCIO5)" in the MachXO2 Pin
column for header pin number 2 in
•
Added a rectangle around
•
Added "VCCIO3 (Bank 3), VCCIO4 (Bank 4) and VCCIO5 (Bank 5) in the current version of
the board with LCMXO2-7000HE-4TG144C device are all connected to the same +3.3V
supply." to Section 7.3.3. Measuring Bank and Core
•
Added footnote 1 and removed "LCMXO2-7000HE-4TG144C" from
•
Added footnote 1, 2, 3 and 4 and removed "LCMXO2-7000HE-4TG144C" from
A.4. FPGA.
Change Summary
Updated description and procedure for downloading demo designs in Download Demo
Designs section.
Updated project file name in Programming a Demo Design with the Lattice Diamond
Programmer section.
Change Summary
Updated procedure in Programming a Demo Design with the Lattice Diamond Programmer
section.
Added information to the procedure on loading the FTDI chip USB hardware drivers via the
standalone package:
Updated description of Reference Designators in the Power and User LEDs Reference table.
Change Summary
Updated Tables 3-6 to include -7000HE information. Added -7000HE notes to Figure 3 and
Appendix A.
Change Summary
Updated document to describe new version of the board featuring the MachXO2-7000HE.
Indicated that the MachXO2-1200ZE version of the board is no longer available.
Change Summary
MachXO2-1200ZE Breakout Board, Top Side figure updated with revision B board photo.
Change Summary
Initial release.
Table 7.5. Expansion Header Pin Information
Figure 7.2. J3/J4 Header Landing
Power.
(J4).
Callout.
Figure A.3. FPGA.
Figure
FPGA-EB-02051-2.3