Lattice Semiconductor MachXO2 Breakout Board User Manual page 17

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Expansion Header Pin Information (J5)
Header Pin Number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
© 2014-2022 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02051-2.3
-1200ZE Function
NC
VCCIO2
PB20D / SI / SISPI
PB20B
PB20C / SN
PB20A
PB18D
PB18B
PB18C
PB18A
GND
GND
PB15D
PB15B
PB15C
PB15A
GND
GND
PB11B / PCLKC2_1
PB11D
PB11A / PCLKT2_1
PB11C
GND
GND
PB9B / PCLKC2_0
PB9D
PB9A / PCLKT2_0
PB9C
GND
GND
PB6D / S0 / SPISO
PB6B
PB6C / MCLK / CCLK
PB6A
GND
GND
PB4D
PB4B
PB4C / CSSPIN
PB4A
MachXO2 Breakout Board Evaluation Kit
Evaluation Board User Guide
-7000HE Function
NC
VCCIO2
PB38B / SI / SISPI
PB37B
PB38A / SN
PB37A
PB35B
PB31B
PB35A
PB31A
GND
GND
PB29B
PB26B
PB29A
PB26A
GND
GND
PB23B / PCLKC2_1
PB18B
PB23A / PCLKT2_1
PB18A
GND
GND
PB16B / PCLKC2_0
PB13B
PB16A / PCLKT2_0
PB13A
GND
GND
PB12B / S0 / SPISO
PB9B
PB12A / MCLK / CCLK
PB9A
GND
GND
PB6B
PB4B
PB6A / CSSPIN
PB4A
MachXO2 Pin
37, 51, 66
71
69
70
68
67
62
65
61
60
58
59
57
56
54
55
52
50
48
49
47
45
43
44
42
41
39
40
38
17

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