Revision History - Lattice Semiconductor CrossLink-NX User Manual

Revision History

Revision 1.3, November 2020
Section
Headers/Connectors and LIFCL-40
Device Ball Mapping
—
Revision 1.2, August 2020
Section
Introduction
Jumpers and Test Connection
Appendix A. CrossLink Evaluation
Board Schematics
Appendix D. Schematics Updates
for ADC Test
Revision 1.1, March 2020
Section
Introduction
Appendix C. Fast Configuration
Issues
Revision 1.0, December 2019
Section
All
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FPGA-EB-02028-1.3
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Change Summary
Made the following revisions in

Changed G32 pin to V16

Changed G34 pin to W17
Corrected table numbering in chapters 7 and 8.
Change Summary
Added Figure 1.3. Silkscreen of CrossLink-NX Evaluation Board and Figure 1.4. Silkscreen of
CrossLink-NX Evaluation Board (Bottom).
Updated J24 and J25 usage for ADC testing in Table 2.1. Jumper Table.
Updated schematics to version B-1.
Added this section.
Change Summary

Added Potentiometer for ADC test feature.

Added call-outs to Figure 1.2. Bottom View of CrossLink-NX Evaluation Board.

Updated the CrossLink-NX Device and the Applying Power to the Board sections.
Added this section.
Change Summary
Initial release
© 2019-2020 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
CrossLink-NX Evaluation Board
Table 8.1. FMC LPC Header Pin Connections.
User Guide
57