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Thank you for choosing the Lattice Semiconductor ispMACH 4256ZE Breakout Board Evaluation Kit! This user’s guide describes how to start using the ispMACH 4256ZE Breakout Board, an easy-to-use platform for evaluating and designing with the ispMACH 4256ZE CPLD. Along with the board and accessories, this kit includes a pre-loaded hardware test program.
• Optional: ispLEVER Classic 1.4 (ispMACH 4000ZE CPLD support) Demonstration Design Lattice provides a pre-programmed demo to illustrate basic operation of the ispMACH 4256ZE CPLD device. The design integrates an up-counter with the on-chip oscillator and timer (OSCTIMER) hardware feature. The design alternates to CPLD outputs, illuminating LEDs D1, D3, D5 and D7 then LEDs D2, D4, D6 and D8.
The preprogrammed demonstration design is an up counter and an output multiplexer to drive an LED array. The demo shows a clock generator based on the ispMACH 4256ZE on-chip oscillator and timer (OSCTIMER) hardware feature. The counter module is clocked at <5kHz to illustrate the ease at which very low speed timer functions can be implemented with a CPLD.
4256ZE Breakout Board Evaluation Kit User’s Guide To load the FTDI chip USB hardware drivers via the stand-alone package: 1. Browse to www.latticesemi.com/breakoutboards and download the FTDI chip USB Hardware driver package. 2. Extract the FTDI chip USB Hardware driver package to your PC hard drive.
USB connector. When the board is connected to a PC with a USB cable, it is recognized by the ispVM System soft- ware as a USB Download Cable. The ispMACH 4256ZE can then be scanned and programmed using the ispVM System software.
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The expansion header landings provide access to user GPIOs, primary inputs, clocks, and Bank 0/1 VCCO pins of the ispMACH 4256ZE. The remaining pins serve as power supplies for external connections. Each landing is con- figured as one 2x20 100 mil.
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4256ZE Breakout Board Evaluation Kit User’s Guide Figure 4. J3/J4 Header Landing Callout Top Side J3 J4 17 IN 38 IN 144 IN 20 IN 45 IN 54 CLK 128 CLK Figure 5. J5/J6 Header Landing Callout Top Side...
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The board features the ispMACH 4000ZE CPLD which is ideal for low-power, high-volume portable applications. The on-board ispMACH 4256ZE is the highest capacity device of the family with 256 macrocells (equivalent to about 450 FPGA LUTs). The 144-pin TQFP package provides 96 user I/Os and 4 dedicated inputs in a 20mm x 20mm package.
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The USB mini-B socket of the Breakout Board serves as the programming and debug interface. JTAG Programming: For JTAG programming, a preprogrammed USB PHY peripheral controller is provided on the Breakout Board to serve as the programming interface to the ispMACH 4256ZE CPLD. Programming requires the ispVM System software.
4256ZE Breakout Board Evaluation Kit User’s Guide Board Modifications This section describes modifications to the board to change or add functionality. Bypassing the USB Programming Interface The USB programming interface circuit (section 6.2.8 USB Programming and Debug Interface) may be optionally bypassed by removing the 0 ohm resistors: R3, R4, R7, and R9 (See Schematic Sheet 2 of 4, Appendix A.
Evaluation Kit User’s Guide Troubleshooting Use the tips in this section to diagnose problems with the ispMACH 4256ZE Breakout Board. LEDs Do Not Flash If power is applied but the board does not flash according to the preprogrammed counter demonstration then it is likely that the board has been reprogrammed with a new design.
1. The ispMACH 4000ZE 1532 interface signals TCK, TMS, TDI and TDO are referenced to VCC=1.8V (logic core). The ispMACH 4256ZE Breakout Board has an issue where the JTAG signals are connected to the FTDI which has a 3.3V interface. This circuit should not be replicated in a production board. As a work-around another FTDI device could be selected or a level translator could be used between the FTDI device and the ispMACH 4000ZE.
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