Figure A.2. Usb Interface To Jtag - Lattice Semiconductor MachXO2 Breakout Board User Manual

MachXO2 Breakout Board Evaluation Kit
Evaluation Board User Guide
5
+3.3V
C5 C8 C6
0.1uF 0.1uF 0.1uF
+3.3V
+3.3V
U2
8 1
VCC CS
7 2
NU CLK
6 3
ORG DI
5 4
C12
VSS DO
0.1uF 93LC56-SO8
5
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26
4
+3.3V
L1
2 1
600ohm 500mA
+3.3V
L2
2 1
600ohm 500mA
VCC1_8FT
C9 C7
0.1uF 0.1uF
C10 C11
10uF 0.1uF
R11 R12 R13
10k 10k 10k
R19 2k2
X1
1
1
2
G1
C13
18pF
12MHZ
4

Figure A.2. USB Interface to JTAG

3
C1 C2
4u7
0.1uF
C3 C4
4u7
0.1uF
VCC1_8FT +3.3V
+3.3V U1
FT2232HL
ADBUS0
50
VREGIN ADBUS1
ADBUS2
49
VREGOUT ADBUS3
ADBUS4
ADBUS5
7
5 DM
DM ADBUS6
8
5 DP
DP ADBUS7
2k2 R9
ACBUS0
14
RESET# ACBUS1
ACBUS2
R10 12k 1%
ACBUS3
6
REF ACBUS4
ACBUS5
ACBUS6
ACBUS7
FT_EECS 63
EECS
FT_EECLK 62
EECLK BDBUS0
61
FT_EEDATA
EEDATA BDBUS1
BDBUS2
BDBUS3
2
OSCI BDBUS4
BDBUS5
BDBUS6
BDBUS7
3 3
3 OSCO
BCBUS0
4
G2 BCBUS1
C14
BCBUS2
13
18pF
TEST BCBUS3
BCBUS4
BCBUS5
FTDI High-Speed USB
BCBUS6
BCBUS7
FT2232H
PWREN#
SUSPEND#
3
2 1
+3.3V
TCK
R1 R2 R3
5k1 5k1 5k1
TMS
TDI
+3.3V
TDO
J1
1
1
2
TDO
2
3
TDI
3
4
4
5
5
6 TMS
6
7
7
8 TCK
8
header_1x8
DNI
16 0 R5
17 0 R6
18 0 R7
19 0 R8
21
22
23
24
26
27
28
29
30
32
33
34
38 0 DNI R14
RS232_Rx_TTL 3
39 0 DNI R15
RS232_Tx_TTL 3
40
0 DNI R16
RTSn 3
41
0 DNI R17
CTSn 3
43
0 DNI R18
DTRn 3
44
0 DNI R20
DSRn 3
45
0 DNI R21
DCDn 3
46
48
52
53
54
55
57
58
59
60
36
AXELSY AXELSY AXELSYS S S
i i T T T it t t l l l e e e
Lattice MachXO2 1200ZE Breakout Board – USB to JTAG
i i S S S iz z z e e e Document Number
L L L CMX X C C M M XO O O 2 2 2 - - - 1 1 1 200ZE E 200Z 200ZE- - - B B B - - - E E E V V V N N N
B B B
D D D at t t e e e : : : a a Thursday, April 21, 2011 S S S h h h e e e e e e t t t
2 1
R4
2k2
TCK
TDI
TDO
TMS
2 2 2 f f o o o f 5 5 5
FPGA-EB-02051-2.3