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FPGA for further processing. A digital video data stream with control is converted to a
composite video stream by the ADV7321A device and associated signal conditioning
circuits. The data stream and control is supplied by the FPGA.
Composite Video Input
Composite video input on connector J18 X1 is first conditioned and then converted to the
digital video data stream, which is passed to the XC2VP4 for further processing. The
ADV7403 device is configurable under user control to select the format of the devices pixel
output port. In SD composite video mode up to 3 10-bit data busses can be used to transfer
the video data.
Composite Video Input Conditioning Circuit
To insure compatibility with the specification an input conditioning circuit is inserted
before the ADV7403 analog input. Impedance matching for the input signal and level
matching for the analog input are assured.
circuit.
ADV7403 Composite Video Input
The conditioned composite video input signal is input on the 11
analog multiplexer. When configured properly by the user the input will be routed to an
analog-to-digital converter and automatic format detection logic to generate the digital
video data stream. Configuration of the ADV7403 device is through the I2C control bus
and appropriate writes to a number of registers. As part of the configuration process the
user will select the format of the output data. For programming details please refer to the
Analog Devices ADV7403 data sheet.
Composite Video Output
Generation of composite video output starts with a digital video data stream being written
from the XC2VP4 into the ADV7321A video encoder, which produces an analog output
that is conditioned and presented on connector J18 X2.
ADV7321A Composite Video Output
The XC2VP4 Xilinx FPGA provides both the digital video data stream and the
configuration to the ADV7321A. Configuration of the ADV7321A defines the interface
connections and active pins for the connection from the XC2VP4 and to the ADV7321A.
For composite video the input format can be configured for either 8/10-bit ITU-BT.656/601
or 16/20-bit YCrCb with embedded HS, VS and FIELD codes. The input digital video data
stream is then converted to an analog composite video output signal that includes all
timing and control signaling.
Composite Video Conditioning Circuit
The analog output of the ADV7321A is processed by a conditioning circuit that insures that
the composite output signal meets composite video drive specifications.
the composite video output circuit.
www.BDTIC.com/XILINX
Video Input/Output Daughter Card
UG235 (v1.2.1) October 31, 2007
Figure 3-2
www.xilinx.com
Composite Video Input and Output
details the implementation of this
th
input of the 12 input
Figure 3-2
details
25
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