Renesas M16C/6N User Manual page 80

M306NKT-EPB User's Manual
Read timing
BCLK
td( BCLK- CS)
CSi
tcyc
td( BCLK- AD)
ADi
BHE
td( BCLK- ALE)
ALE
RD
Hi-Z
DBi
Write timing
BCLK
td( BCLK- CS)
CSi
tcyc
td( BCLK- AD)
ADi
BHE
td( BCLK- ALE)
ALE
WR,
WRL, WRH
Hi-Z
DBi
Figure 4.4 Memory expansion mode and microprocessor mode (3 wait, accessing external area)
REJ10J0519-0200 Rev.2.00 Oct. 16, 2006
th( BCLK- ALE)
td( BCLK- RD)
tac2( RD- DB)
th( BCLK- ALE)
td( BCLK- WR)
td( BCLK-DB)
td( DB- WR)
4. Hardware Specifications
th( BCLK-CS)
th( RD- CS)
th( BCLK- AD)
th( RD- AD)
th( BCLK- RD)
tsu( DB- RD)
th( RD- DB)
th( BCLK-CS)
th( WR-CS)
th( BCLK- AD)
th( WR- AD)
th( BCLK- WR)
th( BCLK-DB)
th( WR- DB)
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