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7.11.7 Display of bus information on the M16C/R8C Debugger
From left to right, the contents are as follows:
•
Address
The status of the address bus
•
Data
The status of the data bus
•
BUS
The width of the external data bus ("8b" for an 8-bit data bus, and "16b" for a 16-bit data bus)
•
BIU
This shows the status between the BIU (bus interface unit) and memory, and BIU and I/O.
Display format
-
DM A
IN T
IB
DB
IW
DW
•
R/W
Shows the status of the data bus ("R" for read, "W" for write, "-" for no access).
•
RWT
This signal shows the effective position in the bus cycle ("0" when effective. Address, Data, and
BIU signals are valid when RWT is "0".
•
CPU
Shows the status between CPU and BIU (bus interface unit )
Status
No change
Data access other than a C U cause such as DMA
Start of INTACK sequence
Instruction code read due to CPU cau e (bytes)
Data access due to CPU cause (bytes)
Instruction code read due to CPU caus (words)
Data access due to CPU cause (words)
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