Specifications; Core System - ADLINK Technology SMARC NXP iMX 8M Series User Manual

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LEC-iMX8M plus User's Guide 1.0

2. Specifications

2.1 Core System

SoC
NXP iMX 8M Series
i.MX8M-plus Quad NPU
i.MX8M-plus Quad
i.MX8M-plus QuadLite:
available either as industrial (-40°C to +85°C) or commercial (0°C to +70°C) type"
L2 Cache
32 KB I-cache 32 KB D-cache (A53)
Memory
2 / 4 / 8GB LPDDR4 memory down (Inline ECC)
security
CryptoAuthentication™ Device, Microchip ATECC608A (optional)
Cryptographic co-processor with secure hardware-based key storage
Protected storage for up to 16 Keys, certificates or data
ECDH: FIPS SP800-56A Elliptic Curve Diffie-Hellman
NIST standard P256 elliptic curve support
SHA-256 & HMAC hash including off-chip context save/restore
AES-128: encrypt/decrypt, galois field multiply for GCM
TPM 2.0 Device, ST Microelectronics ST33HTPH2X32AHD5 (optional)
compliant with Trusted Computing Group (TCG) Trusted Platform Module (TPM) Library specifications 2.0, Level 0, Revision 138 and TCG PC Client Specific TPM Platform
Specifications 1.03
Fault-tolerant firmware loader that keeps the TPM fully functional when the loading process is interrupted (self-recovery)
SP800-193 compliant for protection, detection and recovery requirements
Page 9
4 x Cortex-A53 at 1.6 - 1.8GHz, 1 x Cortex-M7, NPU, GPU, VPU Decode/Encode
4 x Cortex-A53 at 1.6 - 1.8GHz, 1 x Cortex-M7, GPU, VPU Decode/Encode
4 x Cortex-A53 at 1.6 - 1.8GHz, 1 x Cortex-M7
512 KB L2 Cache (ECC)
copyright © 2021 ADLINK Technology Inc.
SGET SMARC Rev 2.1

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