ADLINK Technology SMARC NXP iMX 8M Series User Manual page 25

LEC-iMX8M plus User's Guide 1.0
4.3.2.1 HDMI
Name Pin # Description
HDMI_D2+ P92 HDMI port, differential pair data lines
HDMI_D2- P93
HDMI_D1+ P95
HDMI_D1- P96
HDMI_D0+ P98
HDMI_D0- P99
HDMI_CK+ P101 HDMI port, differential pair clock lines
HDMI_CK- P102
HDMI_CTRL_CK P105 I2C_CLK line dedicated to HDMI
HDMI_CTRL_DAT P106 I2C_DAT line dedicated to HDMI
HDMI_HPD P104 HDMI Hot plug active high detection
signal that serves as an interrupt
request
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I/O I/O Power
Type Level Domain
O TMDS Runtime
HDMI
O TMDS Runtime
HDMI
O OD 1.8V Runtime
COMS
I/O OD 1.8V Runtime
COMS
I 1.8V Runtime
CMOS
copyright © 2021 ADLINK Technology Inc.
PU / Comments
PD
PU 2.2 Level shifter FET and 5V PU resistor shall be placed
between the module and the HDMI connector.
PU 2.2K Level shifter FET and 5V PU resistor shall be placed
between the module and the HDMI connector.
PD 1M Module must tolerate high level in stand-by mode
SGET SMARC Rev 2.1