Analog Devices ADSP-BF506F EZ-KIT Lite Manual page 77

I INDEX
A
ADC enable switch (SW4),
ADC input connector (P7),
ADC loopback switches (SW9-10),
ADC voltage ref (JP6),
architecture, of this EZ-KIT Lite,
audio
codec enable switch (SW4),
input connector (P7),
loopback switches (SW9-10),
B
bill of materials, A-1
board design database,
board schematic (ADSP-BF506F),
boot
modes, 2-8
mode select switch (SW2),
C
CAN interface
connector (J2), 2-17
enable switch (SW5),
clock in (CLK IN) signal,
configuration, of this EZ-KIT Lite,
ADSP-BF506F EZ-KIT Lite Evaluation System Manual
2-9
2-19
2-10
2-13
2-2
2-9
2-19
2-10
1-18
B-1
2-8
2-9
2-3
1-3
connectors
diagram of locations,
J1 (RS-232), 2-17
J2 (CAN), 2-17
J3 (SD), 2-17
P1 (JTAG), 1-8, 1-15,
P2 (expansion), 2-18
P3 (expansion), 2-18
P4 (expansion), 2-18
P5-6 (land grid array),
P7 (ADC input), 2-19
P9 (power), 1-8, 2-19
contents, of this EZ-KIT Lite package,
D
default configuration, of this EZ-KIT Lite,
DIP switch (SW3), 2-9,
DMAX land grid array connectors (P5-6),
E
evaluation license
CCES, 1-10
example programs, 1-18
expansion interface, 1-15,
external memory, 1-13
F
flag pins, See programmable flags by name (PFx,
PGx, and PHx)
2-16
2-17
2-19
1-2
1-3
2-10
2-19
2-18
I-1