Intel PENTIUM PRO Manual page 7

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Figure 2. The Three Core Engines Interface with Memory via Unified Caches
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2.2.1. THE FETCH/DECODE UNIT
Figure 3 shows a more detailed view of the
Fetch/Decode Unit.
PENTIUM® PRO PROCESSOR AT 150, 166, 180, and 200 MHz
System Bus
Bus Interface Unit
L1 ICache
Fetch Load
Fetch/ Dispatch
Decode /Execute
Unit Unit
Instruction
Pool
L2 Cache
L1 DCache
Store
Retire
Unit
The ICache is a local instruction cache. The Next_IP
unit provides the ICache index, based on inputs from
the Branch Target Buffer (BTB), trap/interrupt status,
and branch-misprediction indications from the integer
execution section.
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