Procedure For Setting Up The Test - HP 81200 User Manual

Procedure for Setting Up the Test

HP 81200 Data Generator/Analyzer Platform User Guide, Revision 2.1
Procedure for Setting Up the Test
To set up the test for a new device, it is recommended to perform the
following steps in the given order:
1 Study the Device Under Test (DUT).
Identify its input, output, clock, and trigger or strobe terminals. Gather
information about its electrical, logical, and frequency characteristics.
Actually, this is the most important step of all.
2 Start the HP 81200 system. It comes up with the Connection Editor and
the "default" setting.
If you had already set up the instrument and DUT, you would now load
an appropriate setting.
For details see "Open Setting" on page 71.
3 If not, set the global system parameters.
These parameters refer to the clock module and cover items like clock
source, clock frequency, use of an external trigger, control of the trigger
generator, etc. The tool for setting all kinds of parameters is the
Parameter Editor.
For details see "Setting Global System Parameters" on page 83.
4 Construct an image of the DUT on the screen and connect the DUT pins
to the connectors of the generator and analyzer frontends.
This is supported by the Connection Editor, which automatically shows
an image of the instrument and an empty template for modeling DUT
input and output pins.
For details see "Connecting the DUT" on page 93.
5 Set the characteristics of the input and output connections.
The characteristics include parameters like voltages, fractional or
multiple frequencies, delays, impedances, binary data representation,
and so on. This is done with the Parameter Editor, which in turn can be
run conveniently from the Connection Editor.
For details see "How to Create a Port" on page 97.
6 Decide what kind of test you wish to perform.
Open the Measurement Configuration window. Choices are bit error rate
measurement, capture and compare, or just capture DUT output data.
For details see "Choosing the Kind of Measurement" on page 127.
Test Development Overview
51