Timing Principles; Choice Of Clock Sources; Fmr And Blocklength Granularity - HP 81200 User Manual

Timing Principles

Introduction to the System
Timing Principles
Depending on the frontend it is possible to test devices at frequencies up to
660 MHz. Different frequencies and timely resolutions are achieved by
multiplying the clock frequency.

"Choice of Clock Sources"

"FMR and Blocklength Granularity" on page 31
"Testing up to 1.3 Gbit/s with Two 660 Mbit/s Outputs" on page 33
"Synchronization of Signals" on page 34
"Trigger-Controlled Start and Stop" on page 34
Choice of Clock Sources
The HP 81200 system can be synchronized to an external clock.
The external clock can be used to substitute the built-in 10 MHz reference.
It can also be used to drive the system directly.
Additionally, the system can be started, stopped or gated by an external
signal.

FMR and Blocklength Granularity

The internal data handling is based on words. A word consists of 1 to 16
bits. The number of bits which are allocated to one word depends on the
blocklength granularity. The individual bits allocated at a specific
channel may be varied by setting the frequency multiplier to a value other
than 1.
The 1 Mbit memory of each channel consists of 64 K words. Depending on
how many bits are used, this results in 64 Kbits to 1 Mbits usable memory.
If 16 bits are allocated to a word, it is possible to have up to 660 MHz
signals with 1 Mbit maximum memory depth.
The data streams are organized in blocks. Every block has a certain length.
This length has to be a multiple of the blocklength granularity.
The desired system clock rate determines the minimum blocklength
granularity. The system clock rate is generated by frequency
multiplication. As long as the multiplying factor is less than 16, memory
depth may be traded against segment granularity.
The available multiplying factors and hence the available blocklength
granularities are expressed by the frequency multiplier range (FMR).
The FMR factor shows the relationship between blocklength granularity,
memory depth, and maximum system clock rate.
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HP 81200 Data Generator/Analyzer Platform User Guide, Revision 2.1