HP 81200 User Manual page 148

Creating the Stream of Generated and Expected Data
148
Event commands as well as changes of trigger pod inputs or VXI trigger
lines are processed after three periods of the sequencer clock Clk
If bitstream errors (detected by one of the analyzer frontends) are included
into an event definition, event processing takes 22 periods of the sequencer
clock Clk .
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Once the 11-bit event pattern has been set up, the VXI trigger signals are
set after one period of the sequencer clock. Switching to another sequence
block or setting the master clock module's TRIGGER OUTPUT, however,
requires additional 16 periods of the sequencer clock Clk
N O T E
Especially if you wish to react to errors, this behavior has to be taken into
account. For triggering on errors, you should use the Compare and Capture
mode, because Compare and Acquire Around Error stops automatically
after an error and may terminate the test before you get a reaction (see
also "Choosing the Kind of Measurement" on page 127).
If you wish to react to errors by changing the sequence or setting a trigger
and the respective block is looped, it must have a length of at least
38 * blocklength granularity
to ensure that the system can react during the next repetition of the block.
If the respective block is not looped, proper triggering or sequence
changing on errors during block execution is only ensured, if the block
contains
38 * blocklength granularity
more generated vectors than are compared. Different segments may be
needed for generated and expected data.
Example
If you have a system clock period of 10 ns (100 MHz), a blocklength
granularity of 4, and a block length of 160, error events within the first
8 vectors can directly lead to a trigger signal or sequence change while or
after the block is executed (minimal length is 152). The delay between
error recognition and reaction is 1.52 ms. Later error events are only
processed if the block is repeated, because the reaction to events is
associated with the block.
To react to all possible errors within block execution, the block must have
a length of at least 304 vectors, and the last 152 vectors must not be
evaluated.
Triggers
If you intend to set HP 81200 triggers, please note: Triggers have certain
characteristics. The characteristics of the master clock module's TRIGGER
OUTPUT are part of the global system parameters (see "How to Set the
Characteristics of the Trigger Output" on page 92).
HP 81200 Data Generator/Analyzer Platform User Guide, Revision 2.1
How to Specify Events and Reactions to Events
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