Table 13. Mixed Processor Configurations Error Summary - Intel D50TNP Integration And Service Manual

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Error
Severity
Processor family
Fatal
not identical
Processor model
Fatal
not identical
Processor
cores/threads not
Fatal
identical
Processor cache or
home agent not
Fatal
identical
Processor
frequency (speed)
Fatal
not identical
Processor
Intel® UPI link
Fatal
frequencies not
identical
Processor
microcode update
Major
failed
Processor
microcode update
Minor
missing
220
Intel® Server D50TNP Family Integration and Service Guide

Table 13. Mixed Processor Configurations Error Summary

System Action when BIOS Detects the Error Condition
Halts at POST code 0xE6.
Halts with three long beeps and one short beep.
Takes fatal error action (see above) and does not boot until the fault condition is remedied.
Logs the POST error code into the SEL.
Alerts the BMC to set the system status LED to steady amber.
Displays 0196: Processor model mismatch detected message in the error manager.
Takes fatal error action (see above) and does not boot until the fault condition is remedied.
Halts at POST code 0xE5.
Halts with three long beeps and one short beep.
Takes fatal error action (see above) and does not boot until the fault condition is remedied.
Halts at POST code 0xE5.
Halts with three long beeps and one short beep.
Takes fatal error action (see above) and does not boot until the fault condition is remedied.
If the frequencies for all processors can be adjusted to be the same:
Adjusts all processor frequencies to the highest common frequency.
Does not generate an error – this is not an error condition.
Continues to boot the system successfully.
If the frequencies for all processors cannot be adjusted to be the same:
Logs the POST error code into the SEL.
Alerts the BMC to set the system status LED to steady amber.
Does not disable the processor.
Displays 0197: Processor speeds unable to synchronize message in the error manager.
Takes fatal error action (see above) and does not boot until the fault condition is remedied
If the link frequencies for all Intel® Ultra Path Interconnect (Intel® UPI) links can be adjusted to be
the same:
Adjusts all Intel® UPI interconnect link frequencies to highest common frequency.
Does not generate an error – this is not an error condition.
Continues to boot the system successfully.
If the link frequencies for all Intel® UPI links cannot be adjusted to be the same:
Logs the POST error code into the SEL.
Alerts the BMC to set the system status LED to steady amber.
Does not disable the processor.
Displays 0195: Processor Intel(R) UPII link frequencies unable to synchronize message in
the error manager.
Takes fatal error action (see above) and does not boot until the fault condition is remedied.
Logs the POST error code into the SEL.
Displays 816x: Processor 0x unable to apply microcode update message in the error
manager or on the screen.
Takes major error action. The system may continue to boot in a degraded state, depending
on the "POST Error Pause" setting in setup, or may halt with the POST error code in the
error manager waiting for operator intervention.
Logs the POST error code into the SEL.
Displays 818x: Processor 0x microcode update not found message in the error manager or
on the screen.
The system continues to boot in a degraded state, regardless of the "POST Error Pause"
setting in setup.

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