Table 4. Mixed Processor Configurations - Intel S5500WB12V Specification

Functional Architecture
Error
Processor family not
identical
Processor cache not
identical
Processor frequency (speed)
not identical
Processor microcode
missing
®
Processor Intel QuickPath
Interconnect speeds not
identical

16

Table 4. Mixed Processor Configurations

Severity
Fatal The BIOS detects the error condition and responds as follows:

Logs the error into the system event log (SEL).

Alerts the Integrated BMC of the configuration error with an
IPMI command.

Does not disable the processor.
 Displays ―0194: Processor family mismatch detected‖
message in the error manager.

Halts the system.
Fatal The BIOS detects the error condition and responds as follows:

Logs the error into the SEL.

Alerts the Integrated BMC of the configuration error with an
IPMI command.

Does not disable the processor.
 Displays ―0192: Cache size mismatch detected‖ message
in the error manager.

Halts the system.
Major The BIOS detects the error condition and responds as follows:

Adjusts all processor frequencies to the lowest common
denominator.

Continues to boot the system successfully.
If the frequencies for all processors cannot be adjusted to be the
same, then the BIOS:

Logs the error into the SEL.
 Displays ―0197: Processor speeds mismatched‖ message
in the error manager.

Halts the system.
Minor The BIOS detects the error condition and responds as follows:

Logs the error into the SEL.

Does not disable the processor.
 Displays ―816x: Processor 0x unable to apply microcode
update‖ message in the error manager.

The system continues to boot in a degraded state,
regardless of the setting of POST Error Pause in the
Setup.
Halt The BIOS detects the error condition and responds as follows:

Adjusts all processor interconnect frequencies to lowest
common denominator.

Logs the error into the SEL.

Alerts the Integrated BMC about the configuration error.

Does not disable the processor.
 Displays ―0195: Processor 0x Intel(R) QPI speed
mismatch‖ message in the Error Manager.

If POST Error Pause is disabled in the Setup, continues to
boot in a degraded state.

If POST Error Pause is enabled in the Setup, pauses the
system, but can continue to boot if operator directs.
Intel order number E53971-008
Intel® Server Board S5500WB TPS
System Action
Revision 1.9