4.2.3 Expansion Interface
The expansion interface consists of the three unpopulated connectors.
following table shows the interfaces each connector provides. For the exact pin-
out of these connectors, refer to
does not populate these connectors or provide any additional support for this
interface. The mechanical locations of these connectors can be found in section 0.
Table 4-1: Connector Interfaces
Connector Interfaces
P1
P2
P3
Limits to the current and to the interface speed must be taken into consideration if
you use this interface. The maximum current limit is dependent on the regulator
used and its capabilities. Additional circuitry can also add extra loading to
signals, decreasing their maximum effective speed.
! Analog Devices does not support and is not responsible for the effects of
additional circuitry on the EZ-KIT Lite evaluation system.
4.2.4 JTAG Emulation Port
The JTAG emulation port allows an emulator to access the DSP's internal and
external memory through a 6-pin interface. When an emulator is connected to the
board at P8, the USB debugging interface is disabled. See section
information about the JTAG connector.
To learn more about available emulators, contact Analog Devices (see section
1.1).
ADSP-21160 EZ-KIT Lite Evaluation System Manual
APPENDIX B:
5V, GND, Address[31-0], Data[48-0]
3.3V, GND, FLAG[3-0], SPORT1, ~IRQ[2-0], TIMEXP
GND, Reset, LINKPORT2, memory control signals, D[63-49]
SCHEMATIC. Analog Devices
4.5.5
The
for more
4-30
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