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Expansion Interface
The expansion interface consists of three 90-pin connectors.
shows the interfaces each connector provides. For the exact pinout of the
connectors, refer to
"ADSP-21371 EZ-KIT Lite Schematic" on page
The mechanical dimensions of the connectors can be obtained from
Technical
Support.
Table 2-2. Expansion Interface Connectors
Connector
Interfaces
5V,
J1
3.3V,
J2
5V, 3.3V, reset, parallel port control signals
J3
Limits to current and interface speed must be taken into consideration
when using the expansion interface. The maximum current limit is depen-
dent on the capabilities of the used regulator. Additional circuitry also can
add extra loading to signals, decreasing their maximum effective speed.
Analog Devices does not support and is not responsible for the
effects of additional circuitry.
JTAG Emulation Port
The JTAG emulation port allows an emulator to access the internal and
external memory of the processor through a 6-pin interface. The JTAG
emulation port of the processor also connects to the USB debugging inter-
face. When an emulator connects to the board at
interface is disabled. This is not a standard connection of the JTAG
interface.
ADSP-21371 EZ-KIT Lite Evaluation System Manual
ADSP-21371 EZ-KIT Lite Hardware Reference
,
ADDR23–0
DATA31–0
,
,
FLAG3–0
DAIP20–1
DPI14–1
Table 2-2
B-1.
, SDRAM control signals
, the USB debugging
ZP4
2-7
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