Using The Flags And External Irqs; Table 3-1: Ez-Kit Lite Evaluation System Memory Map - Analog Devices ADSP-21160 EZ-KIT LITE Manual

Table 3-1: EZ-KIT Lite Evaluation System Memory Map

0x0000 0000
Internal
0x0002 0000
Memory
0x0004 0000
0x0008 0000
0x0010 0000
0x0020 0000
Multi- 0x0030 0000
processor 0x0040 0000
Space
0x0050 0000
0x0060 0000
0x0070 0000
0x0080 0000
External
0x0280 0000
Memory

3.4 Using the Flags and External IRQs

The ADSP-21160 has 4 general-purpose flag pins and 3 external interrupt request
(~IRQ) pins.
Lite evaluation system.
The ~IRQ pins can be used only as inputs. To use these pins you must enable the
specific IRQ interrupt, as well as enable global interrupts. You will also need to
write a special interrupt service routine, which will handles the interrupts when
they occur. For more information on configuring the ~IRQ pins, see the
ADSP-21160 SHARC DSP Hardware Reference.
The flag pins can be used as inputs or output depending on how they are
configured in the MODE2 system register. When the flag pins are input their
current state can be found by reading the FLAGS system register. Flag pins set as
outputs will be driven to the value written to the FLAGS system register. The
state of the flags can be written and read from FLAGS system register. For more
information on configuring the flag pins, see the ADSP-21160 SHARC DSP
Hardware Reference.
All of the flags and external ~IRQs pins are brought out to expansion connector
P2. The location of the signals can be found in
ADSP-21160 EZ-KIT Lite Evaluation System Manual
Start Address End Address
0x0000 FFFF
0x0003 FFFF
0x0007 FFFF
0x000F FFFF
0x001F FFFF
0x002F FFFF
0x003F FFFF
0x004F FFFF
0x005F FFFF
0x006F FFFF
0x007F FFFF
0x0087 FFFF
0x0281 FFFF
All other locations
Table 3-2 describes how all of these pins are used on the EZ-KIT
Content
IOP Registers
Long Word
Normal Word
Short Word
ID = 001 Internal Memory
ID = 010 Internal Memory
ID = 011 Internal Memory
ID = 100 Internal Memory
ID = 101 Internal Memory
ID = 110 Internal Memory
ID = 111 Internal Memory
MS0 and BMS (FLASH)
MS1 (SBSRAM)
Not Used
APPENDIX B: SCHEMATIC.
3-26