2.18
System debug
The MPS3 board provides several methods of performing debug.
CoreSight
The following figure shows the MPS3 board debug and trace system.
Debug USB
Processor
debug
20-pin IDC
MICTOR 38
20-pin Cortex debug and ETM
10-pin IDC
•
P‑JTAG processor debug on:
— 20‑pin IDC connector.
— 10‑pin IDC connector.
— 20‑pin Cortex debug and ETM connector.
— 38‑pin MICTOR connector.
•
Serial Wire Debug (SWD) on:
— 20‑pin IDC connector.
— 10‑pin IDC connector.
— 20‑pin Cortex debug and ETM connector.
— 38‑pin MICTOR connector.
— CMSIS-DAP debug over USB on the Debug USB connector, USB 2.0 type B connector.
•
16‑bit trace on a 38‑pin MICTOR connector.
•
4‑bit trace on a 20‑pin Cortex debug and ETM connector.
•
FPGA debug on 14‑pin ILA connector for FPGA debug.
100765_0000_04_en
debug
™
USB
CMSIS-DAP
hub
P-JTAG/SWD
P-JTAG/SWD
P-JTAG/SWD
P-JTAG/SWD
16-bit Trace
P-JTAG/SWD
P-JTAG/SWD
4-bit Trace
P-JTAG/SWD
P-JTAG/SWD
Copyright © 2017–2020 Arm Limited or its affiliates. All rights
Non-Confidential
CMSIS-DAP
controller SWD only
CMSIS-DAP
P-JTAG/SWD
4-bit Trace
16-bit Trace
MPS3 FPGA Prototyping Board
Figure 2-24 MPS3 board CoreSight debug and trace
reserved.
2 Hardware description
2.18 System debug
ILA
device
JTAG 14
F-JTAG
FPGA
2-50