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1.3
Location of components on the MPS3 board
The following figure shows the physical layout of the MPS3 board.
Hardware
Shield and Pmod
push button
power and I/O
(PBRST)
reference voltage
user links
Shield 0
configuration
1
Shield 0
Pmod0/1
interface
interface
1
1
Shield 1
Pmod2/3
interface
interface
1
User
LEDs
User
switches
User
PB1LED
LEDs
User
push
buttons
Configuration
switches
(Reserved)
See
2.12 On-board user components on page 2-39
power and I/O reference voltage user links.
The configuration switches are reserved. For correct operation, you must ensure that both switches are in
the OFF position, that is, pointing away from the board.
100765_0000_04_en
MCC
active
FPGA
LED
Reset
configuration
LED
J25
J30
J24
J27
J28
J26
1
J29
J33
J36
J34
J37
J38
J35
1
J39
UL0
UL7
1
2
3
4
5
6
7
8
PB2LED
PB1 PB2
3V battery
Hardware
Reset
On/Off Soft Reset
push button
push button
(PBRST)
(PBON)
Note
Copyright © 2017–2020 Arm Limited or its affiliates. All rights
Debug
On/Off Soft Reset
USB
push button
active
(PBON)
LED
User
Debug
microSD
USB 2.0
HDMI
card
QVGA CLCD display and
touchscreen
Xilinx Kintex Ultrascale
KU115 FPGA
FMC-HPC
connector
Configuration
microSD
card
for a description of the use of the Shield and Pmod
reserved.
Non-Confidential
1.3 Location of components on the MPS3 board
Audio
connectors
stacked
Combined
stereo
Ethernet and
12V
jacks
dual-USB
DC IN
J59
J58
L R
configuration
Configuration
Figure 1-1 Layout of the MPS3 board
1 Introduction
System
LEDs
PWR ON
3V3 OK
12V OK
Microphone
bias user-links
Shield 1
DDR4
SODIMM
14-pin
F-JTAG
ILA
10-pin IDC
20-pin
Cortex
and debug
20-pin
IDC
38-pin
MICTOR
FMC
(Reserved)
1-15
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