AN4989
5
Breaking and stepping into code
This chapter provides users with highlights about a few points affecting system behavior at
code break.
5.1
Debug support for timers, RTC, watchdog, BxCAN and I
During a breakpoint, it is necessary to choose how the counter of timers, RTC and
watchdog should behave:
•
They can continue to count inside a breakpoint. This is usually required when a PWM is
controlling a motor, for example.
•
They can stop counting inside a breakpoint. This is required for watchdog purposes.
For the BxCAN, the user can choose to block the update of the receive register during a
breakpoint.
2
For the I
Those options are accessible in DBGMCU freeze registers (DBGMCU_APB1FZR1,
DBGMCU_APB1FZR2) which can be written by the debugger under system reset.
If the debugger host does not support these features, it is still possible to write these
registers by software.
Refer to
handle debug options depending on IDEs and needs.
5.2
Debug performance
To save flashing time and improve debugger reactivity when stepping, make sure that the
higher SWD frequency possible is used with the probe.
When using IAR™ EWARM, or Keil
1.8 MHz by default. On system with a core clock greater than 1 MHz, it is safe to use the
highest 4 MHz SWD speed.
C, the user can choose to block the SMBUS timeout during a breakpoint.
Appendix A: Managing DBGMCU registers on page 95
®
MDK-Arm µVISION speed is set at speed is set at
AN4989 Rev 3
Breaking and stepping into code
to find suitable ways to
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C
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