Agilent Technologies VXI 75000 C Series Hardware Manual page 53

Trigger Input Levels And Loading
VXIbus TTL and ECL inputs: meet VXIbus specifications
Front-panel TTL coaxial
High:> 2.0V (internal 50k
Low: < 0.8V at < 250mA
Capacitance: < 10pF, typical
Front-panel ECL coaxial
High:> -1.07V at < 150
Low: < -1.48V at
Capacitance: < 10pF, typical
Pod TTL input
High:> 2.0V (internal 50k
Low: < 0.8V at < 3.35mA
Capacitance: < 10pF, typical
Trigger Timing:
Minimum Pulse Width (High or Low)
VXIbus TTL and ECL inputs: meet VXIbus specifications
Front-panel TTL: 6ns
Front-panel ECL: 4ns
Pod TTL input: 6ns
Minimum Time Between Triggers: 12.5ns + Programmed Trigger Delay.
Latency Time:
Defined as the time which elapses from a (qualified) trigger from the specified source to the specified
Control outputs, with Trigger Delay programmed to 0. Latency from the "Immediate" source is 0; others
are given by the table below. Latency times in the table consist of fixed delays which vary from unit to
unit plus 6.3ns non-cumulative jitter.
To E1450 Outputs (min)
To E1453 Outputs (min)
Trigger Qualifier Timing: Setup time is defined as how long the "Q" inputs must be stable before trigger
edge from the specified source. Hold time is defined as how long the "Q" inputs must remain stable after
a trigger edge from the specified source.
A-4 Agilent E1450 Specifications
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
Ω
pull-up)
µ
A
≅ µ Ω
1.5 A (internal 50k pull-down)
Ω
pull-up)
VXI TTL VXI ECL
79ns 75ns
(max) 93ns 87ns
99ns 95ns
(max) 113ns 107ns
Trigger Source
Front Panel TTL Front Panel ECL
76ns 74ns
88ns 86ns
96ns 94ns
108ns 106ns
Pod TTL
n/a
n/a
106ns
119ns