Table of Contents
Advertisement
Status # 2 (Read Only)
Reading this location gives the status of various state machines in the module.
Address: Base + 20
H
Bit #
15
14
13
12
Value
0
0
ADDR
EOC/SEQCLK
OVR
STATE
Bit Definitions
•
Bits 15-13: 0
•
Bits 12-11: EOC/SEQCLK STATE:
00 = EOC (End of Cycle)
x1 = BOC1 (Beginning of Cycle)
10 = NBE (Neither Beginning nor End of cycle)
•
Bit 10: OSC ACTIVITY (1 = there has been at least one master oscillator cycle since the last time
this location was read; this bit is cleared after being read)
•
Bit 9: ADDR OVER (1 = the stimulus timing generator address counter has advanced past the
timing generator memory space; this bit is cleared by hard or soft reset and by the INIT command)
•
Bit 8: WAIT ACTIVITY (1 = at least one of this register's Bits 7-4 has been set since the last time
this location was read; this bit is cleared after being read)
•
Bit 7: WFT (1 = Waiting for Trigger)
•
Bit 6: WFC2 (1 = Waiting for COND2)
•
Bit 5: WFC1 (1 = Waiting for COND1)
•
Bit 4: WFC0 (1 = Waiting for COND0)
•
Bit 3: BRKPT --Breakpoint--(1 = the sequencer has encountered a Breakpoint)
•
Bit 2: EOS --End of sequence--(1 = the sequencer has encountered an End-of-Sequence)
•
Bits 1-0: RUN/STOP STATE:
00 = Stopped (this state results from an INIT command)
01 = Paused (this state results from a breakpoint, end- of-sequence, or the SET PAUSE command
while running)
1x = Running (this state results from a RUN command issued after proper initialization or from the
Paused state)
NOTE: Bits 10 and 8 are cleared when read.
Artisan Technology Group - Quality Instrumentation ... Guaranteed | (888) 88-SOURCE | www.artisantg.com
11
10
9
8
OSC
ADDR
WAIT
ACTIVITY
OVER
ACTIVITY
7
6
5
WAIT
WAIT
WAIT
WAIT
FOR
FOR
FOR
FOR
TRIG
COND2
COND1
COND0
4
3
2
1
0
BKPT EOS
RUN/STOP
STATEi
Register Maps 3-15
Advertisement
Table of Contents
