Agilent Technologies VXI 75000 C Series Hardware Manual page 26

Chapter Contents
Register Maps
Using This Chapter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Register Addresses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-1
Register Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
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The Base Address . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
A16 Address Space when not using the E1405 Command Module . . . . . . . 3-3
A16 Address Space Using the Command Module . . . . . . . . . . . . . . . . 3-3
Register Offset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-3
ID Register (Read Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
Device Type (Read Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-5
VXI Status/Control (Read) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
VXI Status/Control (Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-6
Status/Control # 1 (Read) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-7
Status/Control # 1 (Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-8
Trigger Control (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
Branch Destination (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-9
Calibration ROM (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-10
Sequencer Memory Address (Read/Write) . . . . . . . . . . . . . . . . . . . . . . 3-10
Sequencer Memory Data (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . 3-11
High-Speed Memory Address (Read/Write) . . . . . . . . . . . . . . . . . . . . . 3-11
Truth Table Memory Data (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . 3-12
Control TG Memory Data (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . 3-12
Control Output Direct Access (Read/Write) . . . . . . . . . . . . . . . . . . . . . 3-13
External Input Direct Access (Read/Write) . . . . . . . . . . . . . . . . . . . . . 3-13
Trigger Delay (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-14
Status # 2 (Read Only) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-15
Command Register (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-16
Stimulus TG Memory Data (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . 3-16
Response TG Memory Data (Read/Write) . . . . . . . . . . . . . . . . . . . . . . 3-17
Prescaler Divide Ratio (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . . 3-17
Stimulus TG Memory Address (Read Only) . . . . . . . . . . . . . . . . . . . . . 3-17
Timing Generator Delay (Read/Write) . . . . . . . . . . . . . . . . . . . . . . . . 3-18
Trigger Output Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3-18