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3-2 Register Maps
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Table 2-1. E1450 Registers within A16 Address Space.
Register Description
Address
(Hex)
(Unused)
3E - 30
Marker Output Control
2E
Timing Generator Delay
2C
Stimulus T.G. Memory Address
2A
Prescaler Divide Ratio
28
Response T.G. Memory Data
26
Stimulus T.G. Memory Data
24
Command Register
22
Status Register 2
20
Trigger Delay
1E
Q- In & External Trigger Direct Access
1C
Control Output Direct Access
1A
Control T.G. Memory Data
18
Truth Table Memory Data
16
Hi-Speed Memory Address
14
Sequencer Memory Data
12
Sequencer Memory Address
10
Calibration Memory
0E
Branch Destination
0C
(Unused)
0A
Trigger In Control
08
Status/Control Register 1
06
VXI Status/Control Register
04
Device Type
02
ID Register
00
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