Constants; Branch Target Addressing Modes - STMicroelectronics ST10 Series Programming Manual

The following indirect addressing modes are pro-
vided:
Table 3 : Table of indirect address modes
Mnemonic
[Rw] Most instructions accept any GPR
(R15...R0) as indirect address pointer.
Some
accept the lower four GPRs (R3...R0).
[Rw+] The specified indirect address pointer
is automatically incremented by 2 or 1
(for word or byte data operations) after
the access.
[-Rw] The specified indirect address pointer
is automatically decremented by 2 or 1
(for word or byte data operations)
before the access.
[Rw+#data ] A 16-bit constant and the contents of
16
the indirect address pointer are added
before the long 16-bit address is calcu-
lated.

2.1.5 - Constants

The ST10 Family instruction set supports the use
of wordwide or bytewide immediate constants.
For optimum utilization of the available code stor-
age, these constants are represented in the
instruction formats by either 3, 4, 8 or 16 bits.
Therefore, short
zero-extended, while long constants can be trun-
Table 5 : Branch target address summary
Mnemonic Target Address
caddr (IP)
rel (IP)
(IP)
[Rw] (IP)
seg -
#trap (IP)
7
Notes
instructions, however,
constants are always
= caddr
= (IP) + 2*rel
= (IP) + 2*(~rel+1)
= ((CP) + 2*Rw)
= 0000h + 4*trap
7
ST10 FAMILY PROGRAMMING MANUAL
cated to match the data format required for the
operation:
Table 4 : Table of constants
Mnemonic
#data
3
#data
only
4
#data
8
#data
16
#mask
Note: Immediate constants are always signified
by a leading number sign "#".

2.1.6 - Branch target addressing modes

Jump and Call instructions use different address-
ing modes to specify the target address and seg-
ment.
Relative, absolute and indirect modes can be
used to update the Instruction Pointer register
(IP), while the Code Segment Pointer register
(CSP) can only be updated with an absolute
value.
A special mode is provided to address the
interrupt and trap jump vector table situated in the
lowest portion of code segment 0.
Target Segment
-
-
-
-
(CSP) = seg
(CSP) = 0000h
Word operation Byte operation
0000 + data 00 + data
h 3 h
0000 + data 00 + data
h 4 h
0000 + data data
h 8 8
data data
16 16
0000 + mask mask
h
Valid Address Range
caddr = 0000h...FFFEh
rel = 00h...7Fh
rel = 80h...FFh
Rw = 0...15
seg = 0...255
trap = 00h...7Fh
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3
4
^ FF
h
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