CoMACM(R)us(-)
Group
Syntax
Operation
Syntax
Operation
Syntax
Operation
Syntax
Operation
Syntax
Operation
Data Types
Result
Description
Multiplies the two signed 16-bit source operands "op1" and "op2". The obtained signed 32-bit product is
first sign-extended, it is then optionally negated prior being added/subtracted to/from the 40-bit ACC regis-
ter content, finally the obtained result is optionally rounded before being stored in the 40-bit ACC register.
"-" option is used to negate the specified product, "R" option is used to negate the accumulator content,
and finally "rnd" option is used to round the result using two's complement rounding. The default sign
option is "+" and the default round option is "no round". When "rnd" option is used, MAL register is automat-
ically cleared. Note that "rnd" and "-" are exclusive as well as "-" and "R". This instruction might be repeated
and performs two parallel memory reads.
In parallel to the arithmetic operation and to the two parallel reads, the data pointed to by IDX
another data located in memory (DPRAM). The address of the overwritten data depends on the operation
executed on IDX
, as illustrated by the following table:
i
Addressing Mode
Mixed Multiply-Accumulate
Parallel Data Move & Optional Round
Multiply/Multiply-Accumulate Instructions
CoMACMus
(tmp)
(ACC)
((IDX
(-⊗)))
i
CoMACMus
(tmp)
(ACC)
(MAL)
((IDX
(-⊗)))
i
CoMACMus-
(tmp)
(ACC)
((IDX
(-⊗)))
i
CoMACMRus
(tmp)
(ACC)
((IDX
(-⊗)))
i
CoMACMRus
(tmp)
(ACC)
(MAL)
((IDX
(-⊗)))
i
DOUBLE WORD
40-bit signed value
[IDX
]
i
[IDX
+]
i
[IDX
-]
i
[IDX
+QX
]
i
j
[IDX
- QX
]
i
j
ST10 FAMILY PROGRAMMING MANUAL
op1, op2
<-- ((op1))*((op2))
<-- (ACC) + (tmp)
<-- ((IDX
))
i
op1, op2, rnd
<-- ((op1))*((op2))
<-- (ACC) + (tmp) + 00 0000 8000
<-- 0
<-- ((IDX
))
i
op1, op2
<-- ((op1))*((op2))
<-- (ACC) - (tmp)
<-- ((IDX
))
i
op1, op2
<-- ((op1))*((op2))
<-- (tmp) - (ACC)
<-- ((IDX
))
i
op1, op2, rnd
<-- ((op1))*((op2))
<-- (tmp) - (ACC) + 00 0000 8000
<-- 0
<-- ((IDX
))
i
Overwritten Address
(no change)
(IDX
(IDX
overwrites
i
(IDX
) - 2
i
(IDX
) + 2
i
) - (QX
)
i
j
) + (QX
)
i
j
h
h
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