STMicroelectronics ST10 Series Programming Manual page 133

CoASHR
Group
Syntax
Operation
Data Types
Result
Description
Arithmetically shifts the ACC register right by as many times as specified by the operand op1. To preserve
the sign of the ACC register, the most significant bits of the result are filled with sign 0 if the original most
significant bit was a 0 or with sign 1 if the original most significant bit was 1. Only shift values between 0
and 8 are allowed. "op1" can be either a 5-bit unsigned immediate data, or the least significant 5 bits (con-
sidered as unsigned data) of any register directly or indirectly addressed operand. Without "rnd" option,
the MS bit of the MCW register does not affect the result. While with "rnd" option and if the MS bit is set
and when a 32-bit overflow or underflow occurs, the obtained result becomes 00 7FFF FFFF
0000 , respectively. This instruction is repeatable when "op 1" is not an immediate operand.
h
MAC Flags
N
*
N Set if the most significant bit of the result is set. Cleared otherwise.
Z Set if the result equals zero. Cleared otherwise.
C Set if a carry is generated (rnd). Cleared otherwise.
SV Set if an arithmetic overflow occurred (rnd). Not affected otherwise.
E Set if the MAE is used. Cleared otherwise.
SL Set if the contents of the ACC is automatically saturated (rnd). Not affected otherwise
Addressing Modes
Mnemonic
CoASHR Rw
n
CoASHR Rw , rnd
n
CoASHR #data
CoASHR #data
⊗]
CoASHR [Rw
m
⊗], rnd
CoASHR [Rw
m
Examples
CoASHR #3, rnd
CoASHR R3
CoASHR [R10 - QR0]
Accumulator Arithmetic Shift Right
Shift Instructions
CoASHRop1
CoASHR
(count)
(C)
DO WHILE (count) ≠ 0
(ACC )
n
(count)
END WHILE
IF (rnd) THEN
(ACC)
(MAL)
END IF
ACCUMULATOR
40-bit signed value
Z C
* *
Rep
Yes
Yes
No
5
, rnd No
5
Yes
Yes
; (ACC) <-- (ACC) >>a 3 + rnd
; (ACC) <-- (ACC) >>a (R3)
; (ACC) <-- (ACC) >>a ((R10))
; (R10) <-- (R10) - (QR0)
ST10 FAMILY PROGRAMMING MANUAL
op1, rnd
<-- (op1)
<-- 0
<-- (ACC ) [n=0-38]
n+1
<-- (count) -1
<-- (ACC) + 00008000
<-- 0
SV
*
Format
A3 nn AA rrrr:r000
A3 nn BA rrrr:r000
A3 00 A2 ssss:s000
A3 00 B2 ssss:s000
83 mm AA rrrr:rqqq
83 mm BA rrrr:rqqq
with Optional Round
H
or FF 8000
h
E SL
* *
Bytes
4
4
4
4
4
4
4-0
4-0
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