STMicroelectronics ST10 Series Programming Manual page 158

ST10 FAMILY PROGRAMMING MANUAL
CoMULu(-)
Group
Syntax
Operation
Syntax
Operation
Syntax
Operation
Data Types
Result
Description
Multiply the two unsigned 16-bit source operands "op1" and "op2". The unsigned 32-bit product is first
zero-extended, and then, it is optionally either negated or rounded before being stored in the 40-bit ACC
register. The result is never affected by the MP mode flag of the MCW register. The "-" option is used to
negate the specified product while the "rnd" option is used to round the product using two's complement
rounding. The default sign option is "+" and the default round option is "no round". When "rnd" option is
used, MAL register is automatically cleared. "rnd" and "-" are exclusive. This non-repeatable instruction
allows up to two parallel memory reads.
MAC Flags
N
*
N Set if the most significant bit of the result is set. Cleared otherwise.
Z Set if the result equals zero. Cleared otherwise.
C Always cleared.
SV Not affected.
E Always cleared.
SL Not affected.
Addressing Modes
Mnemonic
CoMULu Rw , Rw
n
CoMULu- Rw , Rw
n
CoMULu Rw , Rw
n
CoMULu [IDX
CoMULu- [IDX
CoMULu [IDX
CoMULu Rw , [Rw
n
CoMULu- Rw , [Rw
n
CoMULu Rw , [Rw
n
156/172
Unsigned Multiply & Optional Round
Multiply/Multiply-Accumulate Instructions
CoMULu
(ACC)
CoMULu-
(ACC)
CoMULu
(ACC)
(MAL)
DOUBLE WORD
32-bit signed value
Z C
* 0
m
m
, rnd
m
⊗], [Rw ⊗]
i m
⊗], [Rw ⊗]
i m
⊗], [Rw ⊗], rnd
i m
⊗]
m
⊗]
m
⊗], rnd
m
op1, op2
<-- (op1) * (op2)
op1, op2
<-- - ((op1) * (op2))
op1, op2, rnd
<-- (op1) * (op2) + 00 0000 8000
<-- 0
SV
-
Rep Format
No A3 nm 00 00
No A3 nm 08 00
No A3 nm 01 00
No 93 Xm 00 0:0qqq
No 93 Xm 08 0:0qqq
No 93 Xm 01 0:0qqq
No 83 nm 00 0:0qqq
No 83 nm 08 0:0qqq
No 83 nm 01 0:0qqq
h
E SL
0 -
Bytes
4
4
4
4
4
4
4
4
4