STMicroelectronics ST10 Series Programming Manual page 78

ST10 FAMILY PROGRAMMING MANUAL
EXTPR
Syntax
Operation
Description
Overrides the standard DPP addressing scheme of the long and indirect addressing modes and causes
all SFR or SFR bit accesses via the 'reg', 'bitoff' or 'bitaddr' addressing modes being made to the
Extended SFR space for a specified number of instructions. During their execution, both standard and
PEC interrupts and class A hardware traps are locked. For any long ('mem') or indirect ([...]) address in
the EXTP instruction sequence, the 10-bit page number (address bits A23-A14) is not determined by the
contents of a DPP register but by the value of op1 itself. The 14-bit page offset (address bits A13-A0) is
derived from the long or indirect address as usual. The value of op2 defines the length of the effected
instruction sequence.
Note: The EXTPR instruction must be used carefully (see Section 2.7 - ATOMIC and EXTended instruc-
tions on page 38).
Flags
E
-
E Not affected
Z Not affected
V Not affected
C Not affected
N Not affected
Addressing Modes
Mnemonic
EXTPR Rwm, #data
EXTPR #pag, #data
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Begin EXTended Page & Register Sequence
EXTPR op1, op2
(count) <-- (op2)
Disable interrupts and Class A traps
Data_Page = (op1) AND SFR_range = Extended
DO WHILE ((count) ≠ 0 AND Class_B_trap_condition ≠ TRUE)
Next Instruction
(count) <-- (count) - 1
END WHILE
(count) = 0
Data_Page = (DPPx) AND SFR_range = Standard
Enable interrupts and traps
Z
-
Format
DC 11##:m
2
D7 11##:0 pp 0:00pp
2
[1 ≤ op2 ≤ 4]
V C
- -
N
-
Bytes
2
4