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1.7.2 Port B Signals
General-
Purpose
Name
Peripheral Controller:
Dedicated I/O
I/O
Protocol
PB31
FCC2: TX_ER
MII
SCC2: RXD
SI2 TDMB2: L1TXD
TDM serial
PB30
SCC2: TXD
FCC2: RX_DV
MII
SI2 TDMB2: L1RXD
TDM serial
PB29
FCC2: TX_EN
MII
SI2 TDMB2: L1RSYNC
TDM serial
Communications Processor Module (CPM) Ports
Table 1-4. Port B Signals
Dedicated
I/O Data
Direction
Output
FCC2: Media Independent Interface Transmit Error
In the MII interface supported by FCC2. TX_ER is asserted
by the MSC8101 to force propagation of transmit errors.
Input
SCC2: Receive Data
Supported by SCC2. SCC2 receives serial data from RXD.
Output
Time-Division Multiplexing B2: Layer 1 Transmit Data
In the TDMB2 interface supported by SI2. L1TXD supports
serial mode. TDMB2 transmits serial data out of L1TXD.
Output
SCC2: Transmit Data.
Supported by SCC2. SCC2 transmits serial data out of TXD.
FCC2: Media Independent Interface Receive Data Valid
Input
In the MII interface supported by FCC2, RX_DV is asserted
by an external fast Ethernet PHY. RX_DV indicates that
valid data is being sent. The presence of carrier sense, but
not RX_DV, indicates reception of broken packet headers,
probably due to bad wiring or a bad circuit.
Time-Division Multiplexing B2: Layer 1 Receive Data
Input
In the TDMB2 interface supported by SI2. L1RXD supports
serial mode. TDMB2 receives serial data from L1RXD.
Output
FCC2: Media Independent Interface Transmit Enable
In the MII interface supported by FCC2. TX_EN is asserted
by the MSC8101 when transmitting data.
Input
Time-Division Multiplexing B2: Layer 1 Receive
Synchronization
In the TDMB2 interface supported by SI2, this is the
synchronizing signal for the receive channel.
Description
1-27
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