Reset Fun�Tions - Holtek TinyPower HT69F40A Manual

HT69F30A/HT69F40A/HT69F50A
TinyPower I/O Flash 8-Bit MCU with LCD & EEPROM
TM
Reset Functions
There are five ways in which a reset can occur, through events occurring both internally and
externally:
Power-on Reset
The most fundamental and unavoidable reset is the one that occurs after power is first applied to the.
As well as ensuring that the Program Memory begins execution from the first memory address, a
power-on reset also ensures that certain other registers are preset to known conditions. All the I/O
port and port control registers will power up in a high condition ensuring that all pins will be first set
to inputs.
RES Pin
As the reset pin is shared with an I/O pin, the reset function must be selected using a configuration
option. Although the has an internal RC reset function, if the V
enough or does not stabilise quickly at power-on, the internal reset function may be incapable of
providing proper reset operation. For this reason it is recommended that an external RC network is
connected to the RES pin, whose additional time delay will ensure that the RES pin remains low for
an extended period to allow the power supply to stabilise. During this time delay, normal operation
of the will be inhibited. After the RES line reaches a certain voltage value, the reset delay time
t is invoked to provide an extra delay time after which the will begin normal operation. The
RSTD
abbreviation SST in the figures stands for System Start-up Timer.
For most applications a resistor connected between VDD and the RES pin and a capacitor connected
between V and the RES pin will provide a suitable external reset circuit. Any wiring connected to
SS
the RES pin should be kept as short as possible to minimise any stray noise interference.
For applications that operate within an environment where more noise is present the Enhanced Reset
Circuit shown is recommended.
Note: * It is recommended that this component is added for added ESD protection.
Rev. 1.20
V D D
R E S
I n t e r n a l R e s e t
Power-On Reset Timing Chart
Note: t is power-on delay, typical time=50ms
RSTD
V
D D
0 . 0 1 m F * *
1 N 4 1 4 8 *
0 . 1 ~ 1 m F
External RES Circuit
** It is recommended that this component is added in environments where
power line noise is significant.
71
0 . 9 V
D D
t t
R S T D + S S T
power supply rise time is not fast
DD
V D D
1 0 k W ~
1 0 0 k W
P B 0 / R E S
3 0 0 W *
V S S
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