Realtek RTL8169 Manual page 56

Offset# Bit#
0 31
0 30
0 29:14
0 13:0
4 31:17
4 16
4 15:0
8 31:0
12 31:0
Rx Status Descriptor (OWN=0)
When packet is received, the Rx command descriptor turns to be a Rx status descriptor.
bit
31 30 29 28 27 26
O E F L M
W O S S A
N R R
=
0
RSVD
RX_BUFFER_ADDRESS_LOW
RX_BUFFER_ADDRESS_HIGH
2002/03/27
Symbol
OWN
EOR
RSVD
Buffer_Size
RSVD
TAVA
VLAN_TAG
RxBuffL
RxBuffH
PA B B F R R R C
M A O O W E U R
R V V T S N C
F F T
Ownership: This bit, when set, indicates that the descriptor is owned
by the NIC, and is ready to receive a packet. The OWN bit is set by the
driver after having pre-allocated the buffer at initialization, or the host
has released the buffer to the driver. In this case, OWN=1.
End of Rx descriptor Ring: This bit, set to 1 indicates that this
descriptor is the last descriptor of the Rx descriptor ring. Once the
NIC's internal receive descriptor pointer reaches here, it will return to
the first descriptor of the Rx descriptor ring after this descriptor is used
by packet reception.
Reserved
Buffer Size: This field indicate the receive buffer size in bytes.
Reserved
Tag Available: This bit, when set, indicates that the received packet is
an IEEE802.1Q VLAN TAG (0x8100) available packet.
VLAN Tag: If the TAG of the packet is 0x8100, The RTL8169 MAC
extracts four bytes from after source ID, sets the TAVA bit to 1, and
moves the TAG value of this field in Rx descriptor.
VIDH: The high 4 bits of a 12-bit VLAN ID.
VIDL: The low 8 bits of a 12-bit VLAN ID.
PRIO: 3-bit 8-level priority.
CFI: Canonical Format Indicator.
Low 32-bit Address of Receive Buffer
High 32-bit Address of Receive Buffer
16 15 14 13 12
PI PI U T Frame_Length
D D IP D C
1 0 F P P
F F
T
A
VIDL
V
A
56
Description
8 7 6 5 4 3 2 1 0
VLAN_TAG
PRIO C VIDH
FI
RTL8169
Offset 0
Offset 4
Offset 8
Offset 12
Rev.1.21