Config 1 - Realtek RTL8169 Manual

Gigabit ethernet media access controller with power management
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6.12 CONFIG 1

(Offset 0052h, R/W)
Bit
R/W
7:6
R/W
5
R/W
4
R/W
3
R
2
R
1
R/W
0
R/W
2002/03/27
Symbol
LEDS1-0
Refer to the LED PIN definition. These bits initial value com from
93C46/93C56.
DVRLOAD
Driver Load: Software maybe use this bit to make sure that the driver has been
loaded. Writing 1 is 1. Writing 0 is 0. When the command register bits IOEN,
MEMEN, BMEN of PCI configuration space are written, the RTL8169 will clear
this bit automatically.
LWACT
LWAKE Active Mode: The LWACT bit and LWPTN bit in CONFIG4 register
are used to program the LWAKE pin's output signal. According to the
combination of these two bits, there may be 4 choices of LWAKE signal, i.e.,
active high, active low, positive (high) pulse, and negative (low) pulse. The
output pulse width is about 150 ms. In CardBus application, the LWACT and
LWPTN have no meaning.
The default value of each of these two bits is 0, i.e., the default output signal of
LWAKE pin is an active high signal.
* Default value.
MEMMAP
Memory Mapping: The operational registers are mapped into PCI memory space.
IOMAP
I/O Mapping: The operational registers are mapped into PCI I/O space.
VPD
Vital Product Data: Set to enable Vital Product Data. The VPD data is stored in
93C46 or 93C56 from within offset 40h-7Fh.
PMEn
Power Management Enable:
Writable only when 93C46CR register EEM1=EEM0=1
Let A denote the New_Cap bit (bit 4 of the Status Register) in the PCI
Configuration space offset 06h.
Let B denote the Cap_Ptr register in the PCI Configuration space offset 34h.
Let C denote the Cap_ID (power management) register in the PCI
Configuration space offset 0DCh.
Let D denote the power management registers in the PCI Configuration space
offset from 0DDh to 0E1h.
Let E denote the Next_Ptr (power management) register in the PCI
Configuration space offset 0DDh.
PMEn setting:
0: A=B=C=E=0, D is invalid
1: A=1, B=0DCh, C=01h, D is valid, E is valid and depends on whether VPD
is enabled or not.
LWAKE output
0
LWPTN
1
24
Description
LWACT
0
Active high*
Positive pulse
Negative pulse
RTL8169
1
Active low
Rev.1.21

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