Realtek RTL8169 Manual page 54

Tx Status Descriptor (after transmitting, OWN=0, Tx status mode)
After having transmitted, the Tx descriptor turns into a Tx status descriptor.
bit
31 30 29 28 27 26
O E F L R
W O S S S
N R V
= D
0
RSVD
TX_BUFFER_ADDRESS_LOW
TX_BUFFER_ADDRESS_HIGH
Offset# Bit#
0 31
0 30
0 29
0 28
0 27:0
4 31:18
4 17
4 16
cont...
2002/03/27
R R R R R R R RSVD
S S S S S S S
V V V V V V V
D D D D D D D
Symbol
OWN
EOR
FS
LS
RSVD
RSVD
TAGC
RSVD
16 15
RSVD
T R
A S
VIDL
G V
C D
Ownership: This bit, when set, indicates that the descriptor is owned
by the NIC. When cleared, it indicates that the descriptor is owned by
the host system. NIC clears this bit when the relative buffer data is
already transmitted. In this case, OWN=0.
End of Descriptor Ring: When set, indicates that this is the last
descriptor in descriptor ring. When NIC's internal transmit pointer
reaches here, the pointer will return to the first descriptor of the
descriptor ring after transmitting the data relative to this descriptor.
First Segment Descriptor: This bit, when set, indicates that this is the
first descriptor of a Tx packet, and that this descriptor is pointing to the
first segment of the packet.
Last Segment Descriptor: This bit, when set, indicates that this is the
last descriptor of a Tx packet, and that this descriptor is pointing to the
last segment of the packet.
Reserved
Reserved
VLAN Tag Control Bit: 1: Enable; 0: Disable.
1: Add TAG. 0x8100 (Ethernet encoded tag protocol ID, indicating
that this is an IEEE 802.1Q VLAN packet) is inserted after source
address, and 2 bytes are inserted after tag protocol ID from
VLAN_TAG field in transmit descriptor.
0: Packet remains unchanged when transmitting. I.e., the packet
transmitted is the same as it was passed down by the upper layer.
Reserved
54
8 7 6 5 4 3 2
VLAN_TAG
PRIO C VIDH
FI
Description
RTL8169
1 0
Offset 0
Offset 4
Offset 8
Offset 12
Rev.1.21