Function Event; Function Event Mask - Realtek RTL8169 Manual

6.27 Function Event

(Offset 00F0h-00F3h, R/W)
Bit R/W
31:16 -
15 R/W
14:5 -
4 R/W
3:0 -
This register is valid only when Card_En=1 (bit3, Config3) and FuncRegEn=1 (bit1, Config3).
The Function Event (Offset F0h), Function Event Mask (Offset F4h), Function Present State (Offset F8h), and Function
Force Event (Offset FCh) registers have some corresponding fields with the same names. The GWAKE and INTR bits
of these registers reflect the wake-up event signaled on the SCTCSCHG pin. The operation of CSTCSCHG pin is
similar to PME# pin except that the CSTCSCHG pin is asserted high.

6.28 Function Event Mask

(Offset 00F4h-00F7h, R/W)
Bit R/W
31:16 -
15 R/W
14 R/W
13:5 -
4 R/W
3:0 -
This register is valid only when Card_En=1 (bit3, Config3) and FuncRegEn=1 (bit1, Config3).
2002/03/27
Symbol
-
Reserved
INTR Interrupt: This bit is set to 1 when the INTR field in the Function Force
Event Register is set. Writing a 1 may clear this bit. Writing a 0 has no
effect. This bit is not affected by the RST# pin and software reset.
-
Reserved
GWAKE
General Wakeup: This bit is set to 1 when the GWAKE field in the
Function Present State Register changes its state from 0 to 1. This bit
can also be set when the GWAKE bit of the Function Force Register is
set. Writing a 1 may clear this bit. Writing a 0 has no effect. This bit is
not affected by the RST# pin.
- Reserved
Symbol
-
Reserved
INTR Interrupt mask: When cleared (0), setting of the INTR bit in either
the Function Present State Register or the Function Event Register will
neither cause assertion of the INT# signal while the CardBus PC Card
interface is powered up, nor the system Wakeup (CSTSCHG) while
the interface is powered off.
Setting this bit to 1, enables the INTR bit in both the Function Present
State Register and the Function Event Register to generate the INT#
signal (and the system Wakeup if the corresponding WKUP field in
this Function Event Mask Register is also set).
This bit is not affected by RST#.
WKUP
Wakeup mask: When cleared (0), the Wakeup function is disabled,
i.e., the setting of this bit in the Function Event Register will not assert
the CSTSCHG signal.
Setting this bit to 1, enables the fields in the Function Event Register to
assert the CSTSCHG signal.
This bit is not affected by RST#.
-
Reserved
GWAKE General Wakeup mask: When cleared (0), setting this bit in the
Function Event Register will not cause CSTSCHG pin asserted.
Setting this bit to 1, enables the GWAKE field in the Function Event
Register to assert CSTSCHG pin if bit14 of this register is also set.
This bit is not affected by the RST# pin.
- Reserved
Description
Description
32
RTL8169
Rev.1.21