Realtek RTL8169 Manual page 11

TxD[7:0]/ O
Tx[7:0]
RxCLK/ I
RxCLK0
RxCLK1 I
RxER/ I
Rx[9]
RxDV/ I
Rx[8]
RxD[7:0]/ I
Rx[7:0]
COL I
cont...
2002/03/27
135-142
Transmit Data: In GMII mode, TxD[7:0] is a bundle of eight data
signals, representing a data byte on GMII for PHY to transmit. In MII
mode, only TxD[3:0] represent a data nibble on MII for PHY to
transmit. TxD[7:0] or TxD[3:0] transition synchronously with respect
to GTxCLK or TxCLK.
Tx[7:0]: In TBI mode, TxD[7:0] is part of the 10-bit vector (TxD[9:0])
representing one transmission code-group.
156 Receive Clock(0): RxCLK: In GMII mode or MII mode, the receive
clock is a continuous clock that provides the timing reference for the
transfer of the RxDV, RxER, and RxD from PHY device. RxDV, RxER,
and RxD are sampled on the rising edge of RxCLK.
RxCLK0: In TBI mode, the 62.5MHz receive clock is a continuous
clock and provides timing reference for the RTL8169 to latch
odd-numbered receive code-groups from PHY device.
154 Receive Clock1: RxCLK1: In TBI mode, the 62.5MHz receive clock is
a continuous clock and provides timing reference for the RTL8169 to
latch even-numbered receive code-groups from PHY device.
152 Receive Coding Error: In GMII or MII mode, this pin is asserted
synchronously with respect to RxCLK, to indicate that the PHY device
detected a symbol that is not part of the valid data or delimiter set
somewhere in the frame being received. The RxER may be asserted for
one or more clock cycles.
Rx[9]: In TBI mode, Rx[9] is the MSB of the 10-bit vector representing
one receive code-group. Rx[0] is the first bit received, and Rx[9] is the
last bit received.
157 Receive Data Valid: In GMII or MII mode, this input pin is asserted
synchronously with respect to RxCLK, to indicate that the PHY is
presenting recovered, decoded, and valid data to the RTL8169. RxDV
remains asserted while valid data is being presented by the PHY.
Rx[8]: In TBI mode, Rx[8] is a bit of the 10-bit vector representing one
receive code-group. Rx[0] is the first bit received, and Rx[9] is the last
bit received.
165-158 Receive Data: In GMII mode, RxD[7:0] is a bundle of eight data
signals, representing a data byte transmitted from PHY to the RTL8169
on GMII. In MII mode, only RxD[3:0] represent a data nibble
transmitted from PHY to the RTL8169 on MII. RxD[7:0] or RxD[3:0]
transition synchronously with respect to RxCLK.
Rx[7:0]: In TBI mode, RxD[7:0] is part of the 10-bit vector (RxD[9:0])
representing one receive code-group.
151 Collision Detected: In GMII or MII mode, this input pin is asserted
high by PHY to indicate the detection of a collision on the twisted pair
medium, and remains asserted while the collision condition persists. In
full duplex mode, this pin's status is ignored by the RTL8169. The COL
transitions asynchronously with respect to RxCLK, GTxCLK, or
TxCLK.
In TBI mode, this pin's status is ignored by the RTL8169.
11
RTL8169
Rev.1.21