Mitsubishi Electric MELSEC iQ-R AnyWireASLINK User Manual page 99

Output information area
When the on/off data of an output signal of a slave module is written from the CPU module, the slave module automatically
outputs a signal.
■Bit output information area (Un\G4096 to Un\G4111)
Address Output information area
b15 b14
Un\G4096 15 14
Un\G4097 31 30
Un\G4098 47 46
Un\G4099 63 62
Un\G4100 79 78
Un\G4101 95 94
Un\G4102 111 110
Un\G4103 127 126
Un\G4104 143 142
Un\G4105 159 158
Un\G4106 175 174
Un\G4107 191 190
Un\G4108 207 206
Un\G4109 223 222
Un\G4110 239 238
Un\G4111 255 254
*1 Values in the table indicate the start addresses of the slave modules.
Ex.
When the address of the 2-point bit output slave module is set to 30, b14 to b15 in Un\G4097 are occupied as the output
signal.
When the address of the 16-point bit output slave module is set to 50, b2 to b15 in Un\G4099 and b0 to b1 in Un\G4100 are
occupied as the output signal.
■Word output information area (Un\G4608 to Un\G5119)
Address Output information area
Un\G4608 0
Un\G4609 1
Un\G4610 2
Un\G4611 3
Un\G4612 4
 
Un\G5116 508
Un\G5117 509
Un\G5118 510
Un\G5119 511
*1 Values in the table indicate the start addresses of the slave modules.
Ex.
When the address of the 2-word word output slave module is set to 508, Un\G5116 to Un\G5117 are occupied as the output
signal.
*1
b13 b12 b11 b10 b9
13 12 11 10 9
29 28 27 26 25
45 44 43 42 41
61 60 59 58 57
77 76 75 74 73
93 92 91 90 89
109 108 107 106 105
125 124 123 122 121
141 140 139 138 137
157 156 155 154 153
173 172 171 170 169
189 188 187 186 185
205 204 203 202 201
221 220 219 218 217
237 236 235 234 233
253 252 251 250 249
*1
b8 b7 b6 b5 b4
8 7 6 5 4
24 23 22 21 20
40 39 38 37 36
56 55 54 53 52
72 71 70 69 68
88 87 86 85 84
104 103 102 101 100
120 119 118 117 116
136 135 134 133 132
152 151 150 149 148
168 167 166 165 164
184 183 182 181 180
200 199 198 197 196
216 215 214 213 212
232 231 230 229 228
248 247 246 245 244
b3 b2 b1 b0
3 2 1 0
19 18 17 16
35 34 33 32
51 50 49 48
67 66 65 64
83 82 81 80
99 98 97 96
115 114 113 112
131 130 129 128
147 146 145 144
163 162 161 160
179 178 177 176
195 194 193 192
211 210 209 208
227 226 225 224
243 242 241 240
APPX
Appendix 3 Buffer Memory
A
97