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Mitsubishi Electric MELSEC-Q Series User Manual Page 32

Melsec-q/l anywireaslink master module.
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(3) Response delay time
The following shows the response delay time of input and output.
(a) Input response delay time
The figure below shows the time between a signal input to the slave module and the CPU module device
turning on/off.
The input response delay time is the total of 1) to 5) in the following figure.
Slave module
AnyWireASLINK
CPU module
No.
1)
2)
3)
4)
5)
30
Input
1) Input response time on the
slave module
2) Processing time on the
slave module
3) Transmission time
Description
Input response time on the slave module
Processing time on the slave module
Transmission time
Processing time on the master module
Processing time on the programmable
controller
4) Processing time on the
master module
Refer to the manual for the slave module connected to the
system or the device connected to the slave module.
Approx. 0.2ms (The time differs depending on the slave
module.)
Transmission cycle time  2
The transmission cycle time differs depending on the number
of transmission points. ( Page 29, Section 3.2.3 (1))
0.6ms
Sequence scan time  2
5) Processing time on the
programmable controller
Required time

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