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Appendices; Appendix 1 Details Of I/o Signals; Appendix 1; Input Signals - Mitsubishi Electric MELSEC-Q Series User Manual

Melsec-q/l anywireaslink master module.
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APPENDICES

Appendix 1

The details of the I/O signals of the master module for the CPU module are described.
Appendix 1.1
(1) Module READY (Xn0)
When the CPU module is reset or the system is powered on, this signal turns on as soon as the master module is
completely ready to be processed.
(2) DP/DN short error (Xn1)
This signal turns on when a short occurs in the transmission cables (DP, DN) or the maximum supply current is
exceeded.
(a) Turning off DP/DN short error (Xn1)
After eliminating the short circuit in the transmission cables (DP, DN) or adjusting the current within the
specification range, perform either of the following operations.
Until then, DP/DN short error (Xn1) remains on.
• Reset the CPU module or power off and on the system.
• Turn on and off Error flag clear command (Yn0).
For how to remove the short in the transmission cables (DP, DN) or adjust the current within the specification
range, refer to the following. ( Page 95, Section 10.5)
(3) Transmission cable voltage drop error (Xn3)
This signal turns on when the 24VDC external power supply voltage drops.
(a) Turning off Transmission cable voltage drop error (Xn3)
After eliminating the drop of the 24VDC external power supply voltage, perform either of the following
operations.
Until then, Transmission cable voltage drop error (Xn3) remains on.
• Reset the CPU module or power off and on the system.
• Turn on and off Error flag clear command (Yn0).
For how to eliminate the drop of the 24VDC external power supply voltage, refer to the following. ( Page
95, Section 10.5)
Details of I/O Signals

Input signals

APPENDICES
A
101

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