Omron SYSMAC CS Series Instruction & Reference Manual page 676

3. Instructions
(3) Clearing or Holding High-speed Counter Interrupt Causes (N = 10 or 13)
When N is 10 or 13, CLI(691) clears or retains the recorded high-speed counter interrupt cause
(either target-value or range comparison) for the built-in high-speed counter interrupt specified by
N. (CJ1M and CJ2M CPU Units Only)
Note CJ1M CPU Units support only high-speed counter inputs 0 and 1.
Precautions
• Scheduled interrupt tasks cannot be used for CJ2H CPU Units if synchronous unit operation is
being used. An instruction error will occur if the CLI instruction is executed with N set to 4 or 5.
• Since the execution of an interrupt task is prohibited during the execution of the CLI instruction,
the execution of the interrupt task may be delayed, or the interrupt task may not be executed.
Example Programming
 Specifying I/O Interrupts for the CS1W-INT01 or CJ1W-INT01
When W0.00 goes from OFF to ON, CLI(691) clears or holds the recorded causes for the interrupt
inputs from Interrupt Input Unit 0.
W0.00
@CLI
N
S
 Setting the Time to the First Scheduled Interrupt
W0.00
W0.01
Scheduled interrupt 0 (interrupt task 2)
Cyclic task
1. Execution of CLI(691)
(Sets 24 ms to first task.)
642
15 14
D100 1 1
0
D100
0: Recorded interrupt input retained
1: Recorded interrupt input cleared
1 When W0.00 goes from OFF to ON, CLI(691) sets the time to
@CLI
the first execution of scheduled interrupt 0 to 24 ms. (In this
case, the scheduled interval time unit is set to 1 ms in the
N
4
PLC Setup.)
C
&24
2 When W0.01 goes from OFF to ON, CLI(691) sets the time to
the first execution of scheduled interrupt 0 to 12 ms, and
@MSKS
starts the internal timer. (In this case, the scheduled time
N
4
interval units are set to 1 ms in the PLC Setup.)
C
&12
2. Execution of CLI(691)
(Enables interrupt and sets 12 ms.)
24 ms
13 12 11 10 9 8 7 6
1 1 0 1 0 1 1 1
F 5
12 ms
CS/CJ/NSJ Series Instructions Reference Manual (W474)
5 4 3 2 1 0
1 1 0 0 1 0
F 2
12 ms