Figure 11.13 Connection Example With 32-Bit Paged Rom (Synchronous Burst Access Memc); Figure 11.14 Connection Example With 16-Bit Paged Rom (Synchronous Burst Access Memc) - Renesas R-IN32M3 Series User Manual

R-IN32M3 Series: Board design edition
11.2.2.2 Connection Example with Paged ROM
The following figure shows an example when this LSI chip is connected to paged ROM.
R-IN32M3

Figure 11.13 Connection Example with 32-Bit Paged ROM (Synchronous Burst Access MEMC)

R-IN32M3

Figure 11.14 Connection Example with 16-Bit Paged ROM (Synchronous Burst Access MEMC)

Caution. The on-page mode of page ROM is available only when the ROM is connected to CSZ0.
Note. When the "address/data multiplexing" feature is enabled (the ADMUXMODE pin is at the high
level), separate connection of the address bus is not required.
R18UZ0021EJ0400
Dec. 28, 2018
BUSCLK
Note
A2-A21
D16-D31
CSZ0
RDZ
WRSTB Z
D0-D15
BUSCLK
Note
A1-A20
D0-D15
CSZ0
RDZ
WRSTB Z
11. External MCU/Memory Interface Pins
BUSCLK
Note
A0-A19
Paged ROM
O0-O15
(1 Mword × 16 bits)
/CE
/OE
/WE
BUSCLK
Note
A0-A19
Paged ROM
O0-O15
(1 Mword × 16 bits)
/CE
/OE
/WE
BUSCLK
Note
A0-A19
Paged ROM
O0-O15
(1 Mword × 16 bits)
/CE
/OE
/WE
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