Synchronous Burst Access Memc - Renesas R-IN32M3 Series User Manual

R-IN32M3 Series: Board design edition 11. External MCU/Memory Interface Pins
11.2.2

Synchronous Burst Access MEMC

The synchronous burst access MEMC is externally connectable to paged ROM, ROM, SRAM, PSRAM, NOR-flash
memory, or peripheral devices with an interface similar to the SRAM interface via a 16- or 32-bit bus.
By setting the ADMUXMODE pin to high level, the address signals can be multiplexed to be output from data pins.
The external MCU interfaces for the synchronous burst access MEMC and the asynchronous SRAM MEMC are
multiplexed with each other. When the MEMCSEL and MEMIFSEL pins are set to high level and low level respectively,
the synchronous burst access MEMC can be used.
When both the BOOT0 and BOOT1 pins are at low level, booting up proceeds from the memory connected to CSZ0.
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Dec. 28, 2018