Figure 7.4 Wiring Example Of The Differential Signal Transmission Line (1) - Renesas R-IN32M3 Series User Manual

R-IN32M3 Series: Board design edition
The wiring on the board, note the following.
• Long wires should be avoided. R-IN32M3 and, the transformer, and the connector should be placed together as
close as possible.
• Crossing of differential traces with other lines and among each other should be avoided. The components should be
placed that way that crossing of differential pairs of TxP/N and RxP/N is not necessary.
• Differential lines should be routed straight and as short as possible.
• Lines should bend with 135 degree angle or more. (Figure 7.4)
• Traces between R-IN32M3-EC, transformer and RJ-45 connector should be designed with a differential impedance
of 100Ω±10% and with an impedance of 50Ω related to GND.
• The traces of a differential pair should match in length. 0.5mm is the maximum deviation. Adjustments of the length
should be done at the connector, device or transformer.
• Additional to the length the single traces should be designed symmetrical. They should be parallel and routed in the
same layer with continuous width and a preferable fixed spacing. Components, vias and connections should also be
symmetrical.
• Stubs should be avoided.
• Preferable is a large edge gap at differential pairs. An empty space of five times of the trace width between
differential pair and other signals, planes or components is recommended.
• Differential lines should not cross edges of the GND/supply plane, other planes or voids in the layer below. For
continuous impedance a GND plane in the layer below is preferable.
• Beneath the magnetics no lines or planes should be routed.
• Preferable differential pairs should be routed via as little vias as possible. If vias are necessary, note the following:
(a) Vias of the related plane (e.g. AGND) should be placed near the signal vias. The distance between signal
via and GND via should be equal to the distance between the layers to avoid a discontinuity of the
impedance. (See Figure 7.6)
(b) Void and no planes between and around the signal vias. Metal of planes close to the differential vias could
influence the impedance.
(c) The diameter of the vias should be almost equal to the trace width. (See Figure 7.6)

Figure 7.4 Wiring Example of the Differential Signal Transmission Line (1)

R18UZ0021EJ0400
Dec. 28, 2018
7. Ethernet PHY Pins (R-IN32M3-EC Only)
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